MCUs in the SPC57 family are built on the 32-bit Power Architecture SPC5 microprocessor platform; the product family targets cost-sensitive automotive systems that must meet the most stringent safety requirements, up to the highest ISO26262 ASIL-D Automotive Safety Integrity Level. They are system-on-chip (SoC) devices designed to meet the challenges of entry-level vehicle safety-critical applications
Car makers must ensure that key functions are protected against random failures, such as those caused by a single cosmic ray changing a bit in a memory cell. ST’s SPC57 devices are specifically designed to address this challenge, providing highly competitive solutions for controlling vehicle functions such as steering and braking while offering safety compliance to the highest level combined with low-cost development paths.
The SPC57 family is built on an advanced 55nm automotive technology with clock speeds up to 80 MHz. It is supported by a full-featured, low-cost tool chain that is compatible with the existing development infrastructure of current Power Architecture devices, enabling rapid development of new cost-effective, safety-critical automotive systems. The design ecosystem includes the free SPC5Studio development environment, open-source code compilers, and a range of evaluation boards that start from as low as $100.
The first four members of the SPC57 family are the SPC570S50E1 (512k Flash memory in a QFP64 package), SPC570S50E3 (512k in QFP100), SPC570S40E1 (256k in QFP64), and SPC570S40E3 (256k in QFP100), with the exposed-pad QFP packages supporting increased user pin-out functionality and thermally demanding applications. The QFP64 devices are available now, with the QFP100 devices scheduled for the end of Q1 2016.