Safety processor family builds bridge to the future of in-car computing

June 18, 2018 // By Christoph Hammerschmidt
With a new microprocessor family is NXP targeting automotive applications areas where real-time behavior and safety is critical such as braking and steering - the new S32S processor line. With support for hypervisors, the processors are already building a bridge to the future of in-car computing with centralized architectures.

In the field of automation, experts speak of a three-part functional hierarchy: sense, think, act. The new microprocessor from NXP is designed to operate the third part of this chain, "Act", explained Ray Cornyn, VP and General Manager Vehicle Dynamic Products at NXP. With four lockstep cores working in parallel at a clock cycle of 800MHz, the device offers the by far highest performance of any comparable microprocessor in that application field, Cornyn claims.

The NXP S32S processors use an array of the new Arm Cortex-R52 cores, which integrate the highest level of safety features of any Arm processor (see Fig. 1). The array offers four fully independent ASIL D capable processing paths to support parallel safe computing. In addition, the S32S architecture supports a new “fail availability” capability allowing the device to continue to operate after detecting and isolating a failure – a critical capability for future autonomous applications.


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