Embedded designers are increasingly tasked with enabling more functionality in embedded applications to deliver feature-rich and highly interactive user experiences. A good example of this is the evolution of electronics technology within automobiles. In the past years we've seen a complete transformation where things like digital dashboards and infotainment systems that control temperature, entertainment and more, have become the norm. A next step will be head up displays and highly advanced instrument clusters enabling apps in the connected car and thus effectively acting as your smartphone in the car. There will be the familiar controls for radio and navigation, along with new features for self-parking, advanced GPS and more. For this you need crisp 2D and 3D graphics on the display which again require fast processing.
High performance as well as cost and space saving
Especially in the automotive industry, the growing demand for infotainment and connectivity drives designers not only to go for higher performance solutions but also to lean on the cost and space savings side. Up to now, they have been able to take advantage of parallel NOR devices for performance. The industry is transitioning to serial peripheral interface (SPI) memories to take advantage of the low signal count and systems with a Quad SPI (QSPI) NOR memory can even achieve up to 80 MB/s data throughput using a single (DDR) QSPI memory with a so called data learning pattern (DLP). DLP is a Spansion-patented technology and, currently, only Spansion QSPIs with DLP can achieve these rates. Two QSPI devices would double the data throughput to 160 MB/s. These SPI memories retain compatibility with the original interface specified over 25 years ago. However, as the system-level read throughput continues to demand ever increasing speeds, a new look at the embedded memory interface offers a solution.
A new interface accelerates data throughput
Using a high speed interface such as the Spansion HyperBus Interface used by Spansion’s HyperFlash memory,