Safety and reliability
The LTC3375 includes a system watchdog circuit that can be used to initiate an automatic system reset in the case where the microprocessor has become corrupted. The watchdog circuit monitors a microprocessor’s activity. The microprocessor is required to change the logic state of the watch dog timer input (WDI) pin at least once every 1.5 second in order to clear the watchdog timer and prevent the watchdog timer output (WDO) pin from signaling a timeout.
The watchdog timer begins running immediately after a power-on reset and will continue to run until a transition is detected on the WDI input. During this time, WDO will be in a high impedance (Hi-Z) state. Once the watchdog timer times out, WDO will be pulled low and the reset timer is started. If no WDI transition is received when the reset timer times out, after 200ms, WDO will again become Hi-Z and the 1.5 second watchdog reset time will begin again. If a transition is received on the WDI input during the watchdog timeout period, then WDO will become Hi-Z immediately after the WDI transition and the 1.5 second watchdog reset time will begin at that point.
WDO being pulled low may be used to force a reset on the controlling microprocessor. This reset can be implemented in a few ways. If it