The single TriCore architecture is currently in use internationally by around fifty automobile manufacturers, it is contained in every second vehicle that is currently produced, and in the field of motor controls it is even the market leader worldwide. This is a success story that Infineon hopes to top in future with the AURIX (AUtomotive Realtime Integrated neXt generation architecture) multicore microcontroller (MCU) family. Given the enormous performance of this new architecture, the chances of achieving this are certainly not bad.
Figure 1: AURIX architecture (source: Infineon). For full resolution click here .
Figure 1 shows the AURIX architecture variant with three TriCoreTM cores used with the current TC27x derivatives. The two TriCore 1.6P cores — P stands for performance — can execute up to three instructions in one cycle and operate with a maximum clock frequency of 300 MHz. The efficiency TriCore 1.6E, on the other hand, is optimized for low power consumption and an efficient data exchange with the periphery.
The efficiency TriCore 1.6E and one of the two performance cores are also each assigned a Lockstep core, which is from the circuit and spatially isolated on the chip. In Lockstep mode, this core executes the same machine instructions as the actual core with a delay of two cycles. Logic compares the results and in the event of deviations can react with an interrupt or reset to this exceptional situation. Thanks to these hardware structures, the AURIX architecture can also be used in applications that have to meet the Automotive Safety Integrity Level D (ASIL‑D) standard.
In addition to the TriCore cores, two further programmable units with their own machine language were implemented on the chip. The standard microcontroller core-based HSM (hardware security module) serves to protect the software. The Generic Timer Module (GTM), on the other hand, can be used for time measurements, Capture/Compare of digital input signals and PWM (pulse width modulation). Therefore, with