Divide by N for synchronizing DC/DC converter clocks

April 29, 2014 //By Dan Tooth, Texas Instruments
Divide by N for synchronizing DC/DC converter clocks
Dan Tooth of Texas Instruments considers how to utilize a clock divider for producing differently-phased clocks for clocking the converters found in automotive power conversion solutions.

Automotive power conversion solutions frequently use a step-down dc/dc converter connected to the vehicle battery, switching at a frequency below the Radio MW band (i.e. < 530kHz), plus downstream dc/dc converters (e.g. a power management IC, PMIC) switching above the MW band [1] (i.e. > 1.7MHz). It can be desirable to synchronize their clock frequencies, to make the emissions spectrum predictable during test and production. Synchronizing clocks to a central clock source can also prevent them interfering with sensitive analogue or digital sections of the overall system. Alternatively, multiple dc/dc converters can be all powered off the vehicle battery, each one switching below the MW band. To reduce the MW band harmonics, then synchronizing their clocks out-of-phase can be desirable.

First Application – Single dc/dc plus PMIC
In the first automotive application, Figure 1, the PMIC outputs its own self-generated switching frequency clock of 2.2MHz (above the MW band) and this is to be divided down to clock the TPS54360-Q1 at a frequency below the MW Band. Dividing by four gives 550kHz, which is within the MW band. Dividing by eight (the next power of two) would give a low switching frequency of 275kHz. Dividing by five gives a frequency of 440kHz, just below the MW band. The goal is to use as high a switching frequency as possible to minimize passives’ sizes (the inductor’s size is inversely proportional to switching frequency), whilst placing the fundamental below the MW Band.  Dividing a clock by non-powers of two requires a bit more thought. In this particular application the solution needs to be low cost, robust and the ICs automotive-qualified. There is no requirement for the clock to have a 1:1 mark-to-space ratio, which simplifies the solution.

Figure 1 – Two dc/dc Converters with Clock Synchronization at Different Frequencies via a Divide by Five. TPS54360-Q1 is switching below the MW band and the PMIC above it

The Clock Divider
Using a decade

Design category: 

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