Processing horsepower for the convergence of data streams: Page 3 of 6

July 03, 2014 //By Christoph Hammerschmidt
Processing horsepower for the convergence of data streams
Renesas Electronics’ second-generation R-Car range is the company’s response to the growing demand for automotive-enabled system-on-chip (SoC) processors for driver infotainment and assistance systems. With more than 25,000 Dhrystone MIPS CPU power and a 3D performance of 260 million triangles, the 8-core R-Car H2 is the flagship of this family based on the latest 28nm silicon process. This article presents the R-Car family’s scalability in a range of automotive applications and highlights the integrated hardware accelerators that enable developers to achieve compelling performance for their applications while keeping power consumption low.
temperature dependent – it doubles every 25 to 30 kelvins. So although leakage current in a smartphone at room temperature is still at a reasonable level, it can be ten times higher in an automotive environment and even exceed dynamic power consumption. A transistor needs to be designed for the maximum clock speed possible, yet fast transistors also tend to have high levels of leakage current. That is why it is becoming standard practice in chip design to use libraries of transistors at varying speeds. The fastest ones are only used if the design really requires them. A reduction in the highest clock speed to meet the application’s requirements plays a big part in reducing power consumption.

Renesas took all these issues into account when designing and developing the R-Car, its new, second-generation application processor family for automotive applications. The company made good use of its many years of chip design experience right from the outset. Renesas’ top priority for this product was to solve the performance vs. power conundrum – in other words, to double performance level while remaining true to its “Design for Power” strategy. Combining these two rather contradictory goals resulted in the need for a few optimisations.

In order to achieve the performance goals, Renesas developed the R-Car product using the latest 28nm process. This process enables the integration of roughly twice the number of transistors on the same chip surface compared to 40nm technology. Despite the smaller structure width, Renesas managed to keep leakage current at the same level while reducing dynamic losses by about 20 per cent per transistor.

Implementing the huge processing power of over 25,000 Dhrystone MIPS was only possible with the integration of an ARM Cortex A15 quad-core at 1.4 GHz. This quad-core is joined by another almost 800 MHz Cortex A7 quad-core, which helps out its bigger buddy by seamlessly taking on software-related tasks if it is not too busy

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