Embedded ADAS Algorithm Optimization with High-Performance DSP IP and CV Software Library: Page 2 of 6

January 19, 2017 //By Charles Qi, Han Lin, Cadence
Embedded ADAS Algorithm Optimization with High-Performance DSP IP and CV Software Library
Recently computer vision (CV) technology has seen a rapidly increasing rate of adoption in the application of autonomous driving. CV algorithms are very compute intensive. Deployment of these algorithms often requires specialized high-performance DSPs or GPUs to achieve real-time performance while maintaining flexibility.

The process of embedded vision application development typically consists of five steps, shown in Figure 1.


Figure 1: Embedded Vision Application Development Flow

In this white paper, we briefly touch on the characteristics and challenges of lane-detection algorithms. Then we turn our focus to the implementation and optimization of the algorithm in steps 3 and 4, using the Tensilica Vision DSP and the corresponding DSP-optimized CV library, XI library.

Implementing a Robust ADAS Lane-Detection Algorithm

The lane-departure warning system (LDWS) has been an essential function to the realization of an ADAS system for autonomous driving. Almost every LDWS starts with a lane-mark-detection phase that can be generalized and simplified with the following key steps:

  • Road feature extraction
  • Post-processing for outlier removal
  • Tracking filtering and data fusion

The accuracy and reliability of LDWS depends on the accuracy and robustness of the lane-detection algorithm, which must take into consideration the shapes of the lane marks, non-uniform texture on the road surface, lighting conditions, shadows and obstructions, etc., while computing in real time following the high-speed movement of the vehicle. In this paper, we present a robust lane-mark-detection algorithm that deploys multiple CV processing steps to enhance the robustness of the detection.

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