How joint qualification of new memory devices helps to improve system quality, as well as chip quality: Page 2 of 6

October 21, 2016 //By Marcel Kuba
How joint qualification of new memory devices helps to improve system quality, as well as chip quality
Engineers in the automotive industry are subject to conflicting pressures. On the one hand, they are always looking for new products and technologies that will help to solve the pressing design problems that they face.

JQ uncovers these potential impairments and risks. It does so by testing known potential problems, and marginal electrical parameters such as critical timings, in a customer’s system, and checks that the problems have been eliminated. What is more, JQ enables the silicon supplier to catch previously unknown problems that arise when the IC’s functions are exercised in a real application. JQ is not only about preventing failures, either: it also offers the potential to optimise system performance, for instance by increasing data throughput between a memory IC and a processor chipset.

So what’s not to like about JQ? The main drawback is obvious: JQ requires time, effort and resources on the part of both the silicon supplier and the automotive manufacturer. But in Cypress’s opinion, this cost is well worthwhile. JQ enables an IC to reach the highest possible level of quality in field usage.


Better prepared for failures

Perhaps an even more important consideration is that, in the unfortunate event that a device fails on deployment, JQ can help the IC supplier to diagnose the problem and resolve it more quickly. When a customer returns a failed device from the field, diagnosis begins – ideally – with the connection of high-performance analysis tools to the device.

Unfortunately, the complex PCBs found in automotive systems such as instrument clusters or infotainment units are typically populated with ICs housed in ball grid array (BGA) packages, the physical design of which is ill suited to deep system investigation. As a result, it is extremely difficult to connect instruments such as logic analysers or oscilloscopes close to a device such as a Flash memory IC, to capture exactly what happened on the memory bus at the moment the failure occurred.

Unfortunately, to prepare a multi-layer PCB for a deep analysis of a device in a BGA package may take several weeks. And this delay is seldom acceptable to the automotive customer which suffered the fault.

When performing a complete JQ, however, a specification for the new customer platform on which the IC is to be tested can be that it must allow a detailed and deep failure analysis to be performed immediately when necessary. This test platform is then available when needed to support the rapid investigation and resolution of failures in the field.

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