CPU, DRAM ride organic substrates at ISSCC
Papers at the International Solid State Circuits Conference described the first simple microprocessor and DRAM structures built on organic substrates as well a process for printing both n- and p-type transistors on a plastic substrate.
The rudimentary nature of the devices made it clear that it’s still early days for low cost, low power organic electronics. "We will see if in 20 years time half the designers here will be working on silicon and half on plastic," Jo De Boeck, a senior vice president at Belgium’s Imec research institute said at an ISSCC keynote.
Imec researcher Kris Myny described a simple 8-bit processor that handled up to six instructions per second in an averaging routine. It implemented arithmetic, logic and bit-shift functions and had three programmable registers.
The 3,381-transistor device had the equivalent of 30 pin outs and consumed 92 microwatts at 10V. It was built in an organic process developed by Polymer Vision (Eindhoven, Netherlands), a flexible display maker.
The Imec device actually had more transistors than the Intel 4004, an early silicon processor. Like the Intel chip it used only P-type transistors.
Operating the device was a challenge. Imec developed an instruction generator block on a separate foil substrate with hard-coded instructions inserted into the processor via a traditional development board.
"Ideally you want an embedded microprocessor with non-volatile memory and 8-bit input and output, but the organic technology is not mature enough for this," Myny said.
Engineers need to drive organic processors up to kilohertz frequencies by optimizing critical paths and using high mobility semiconductor materials, he said. He also called for more complex circuit capabilities including n-type transistors, something demonstrated in a separate ISSCC paper.
Myny said the fledgling field also needs a process technology roadmap. The four papers in the ISSCC session all used significantly different organic thin-film transistor processes.
In a separate paper, Wei Zhang of the University of Minnesota described a 64-bit organic DRAM capable of a 12 millisecond read and a 20 millisecond write operation. The 8×8 array used a three-transistor DRAM cell and consumed 10nW per bit of refresh power.
Researchers have described organic versions of non-volatile and SRAM memories but have not previously worked on a general purpose DRAM, Zhang said. His next step will be to integrate the DRAM array with an organic flexible display, using the memory for image storage.
The device was made with an aerosol jet printer using an electrolyte with gate capacitance one or two order of magnitude higher than a traditional 65nm silicon DRAM. Like the organic processor it used only P-type transistors.
Coming to the rescue of both the CPU and DRAM designers, a researcher from the CEA-LITEN research lab in France described a new process for printing CMOS structures on a plastic substrate.
"This process has the capability to produce N and P transistors with matching performance for both digital and analog applications," said Anis Daami, author of the paper and a research engineer at CEA (Grenoble).
He showed a range of devices on foil sheets as large as 380 x 320 mm created with laser ablation. Most of the designs were implemented with relatively wide 20 micron channels, however the process can support narrower lines.
"We are now we are working to lower channel values," he said.
Test devices produced to date include CMOS inverters that are fully functional even at very low voltage supplies. They exhibited relatively high swing, acceptable gains and noise margins at 30 percent of supply voltage.
Daami also described functioning ring oscillators in the 10-200 Hz range and a NAND gate. The process marks an advance over previous work that printed both N- and P-type transistors but could not fully print some elements or required use of a vacuum or extra lithography steps.
The CEA devices all passed functional testing without use of a vacuum at ambient temperature "on my desk," he said.
Finally, a researcher from the Institute for Microelectronics Stuttgart described a 6-bit digital-analog converter claimed to be 1,000 times faster and 30 times smaller than previously published organic DACs.
However, the DAC did consume 180-260 microwatts at 1-2-V, significantly higher than previously published work at 0.7 microwatts. It used 129 transistors compared to 26 in an earlier DAC.
The design has a minimum channel length of four microns. It was fabricated on a new process using a glass substrate but without solvents and at a maximum processing temperature of 90 degrees C.
Due to process limitations, the design was not able to use resistors, eliminating some DAC architectures. Researcher Tarek Zaki implemented the DAC as a current-steering device for optimal speed and compactness.