Fraunhofer zooms RISC-V into the functional safety zone

Fraunhofer zooms RISC-V into the functional safety zone

Technology News |
To meet the strict requirements of functional safety in automotive applications, the Fraunhofer Institute for Photonic Microsystems IPMS has developed a fault-tolerant embedded RISC-V processor core. This IP core, called EMSA5-FS, is now being marketed by the partner CAST Inc.
By Christoph Hammerschmidt


Fraunhofer IPMS´ embedded RISC-V processor for functional safety is a 32-bit, in-order, single-issue, 5-stage pipeline processor. Fail-safe features of the EMSA5-FS processor include dual- and triple-mode redundancy (with/without lockstep), error correction code (ECC) protection of the internal buses, a configurable memory protection unit, privileged operation modes, and reset and safety manager modules. The core is available as a stand-alone processor or as a pre-configured subsystem combined with typical peripheral components for ASIC and FPGA implementations.

With the fault-tolerant design of the EMSA5-FS processor and the supplied safety documents, users can achieve ISO 26262 certification up to ASIL-D, the highest automotive safety integrity level. It is thus suitable for use in safety-critical systems in the vehicle. Due to its support for multiple IDEs, the processor core enables efficient and professional software development for complete systems, also in the context of functional safety according to ISO 26262 and IEC 61508. Specific documents supplied include FMEDA (Failure Modes, Effects, and Diagnostic Analysis) and SAM (Safety Manual). Available FPGA-based development kits and sample designs also facilitate certification, evaluation and rapid prototyping.

Customers using CAN and TSN automotive IP cores have limited options for a suitable ISO 26262-compliant microcontroller core. It is these customers that IP distributor CAST hopes to address with the distribution of the EMSA5-FS. “The EMSA5-FS meets or exceeds their needs,” promises CAST managing director Nikos Zervas. It makes the entire RISC-V ecosystem and development community available to customers to accelerate projects while meeting the functional safety requirements of their systems.”

Developers using the EMSA5 FS processor core can use open-source RISC-V development environments (IDE), test tools and libraries, including the GNU toolchain and the comprehensive Eclipse IDE with OpenOCD debug support. Fraunhofer IPMS is also working with commercial third-party compilers and software tools to enable support for EMSA5-FS through Safety Ready development toolsets. For example, using the IAR Embedded Workbench for RISC-V to program EMSA5-FS enables end-to-end IEC 61508 and ISO26262 compliant development.

The processor IP can be made available for any FPGA platform. Integration into customer-specific ASICs for any foundry technologies is also possible. The Fraunhofer IPMS also provides services to extend the processor core IP with customer-specific modules. In addition, complete subsystems can also be developed using the automotive communication IP cores LIN, CAN2.0/FD/XL and Ethernet TSN provided by the Fraunhofer IPMS.

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