RISC-V Workshop Zurich – 11-13 June

RISC-V Workshop Zurich – 11-13 June
11 Jun 2019
13 Jun 2019
RISC-V is fast gaining support as an attractive license-free approach to designing new microprocessors. The RISC-V Workshop taking place between the 11th and 13th of June in Zurich will give you a full view of the RISC-V ecosystem, with discussions on current and prospective RISC-V projects and implementations, giving you the opportunity to influence the future evolution of the instruction set architecture (ISA).

The workshop includes two full days of presentations and updates on the RISC-V architecture, commercial and open-source implementations, software and silicon, vectors and security, applications and accelerators, simulation infrastructure and much more.

The speaking line-up will include leaders from the major players in the RISC-V ecosystem, including the leading technology companies and research institutions driving the RISC-V ISA specification.

More information and registration at https://tmt.knect365.com/risc-v-workshop-zurich/

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