Automotive GPU is safety capable with RISC-V controller core
Imagination Technologies has launched it’s first safety certifiable GPU core for instrument clusters, driver assistance and autonomous vehicle designs.
The B-Series GPU IP includes Imagination’s first ISO 26262-capable cores. The IMG BXS providing a wide range of options for automotive; from small, safety-fallback cores, to multiple teraflops of compute for advanced driver-assistance systems (ADAS) and high-performance autonomy.
“With these cores we have a new safety architecture and ways to ensure rendering is happening correctly,” said Andrew Girdler, product manager at Imagination. The PowerVR rendering engine used in the cores is tile-based, so Imagination uses a tile region protection mechanism to identify screen regions and protect them, for example for areas of the screen that show warnings. This avoids the screen area being overwritten.
The B-Series is also the first to use a multicore approach, which allows two cores to run in lock step or to check each other’s results in an ASIL-B level design. Imagination has also added end to end CRC redundancy checking with a new block that checks data arrives correctly.
All the multicore GPU designs for automotive use a small firmware processor based on the RISC-V architecture to coordinate the cores.
The BXS already has licensees in the in-vehicle infotainment (IVI) space, says Girdler on 12 to 16nm process technologies. “Then for some other products with the RISC-V firmware processor for autonomy we are looking 2TFLOPS of performance, and then on 7 or 5nm with network acceleration with AI, we have a licensee in this space,” he said.
Related articles
- Multicore GPU aims at 3nm for data centre designs
- Elektrobit, Unity Technologies develop immersive 3D cockpits
- LDRA supports ARM architecture in safety-critical automotive applications
If you enjoyed this article, you will like the following ones: don't miss them by subscribing to :
