CrossLinkPlus devices are low power FPGAs featuring integrated flash memory, a hardened MIPI D-PHY and high-speed I/Os for instant-on panel display performance, and flexible on-device programming capabilities. Additionally, Lattice provides ready-to-use IPs and reference designs to accelerate implementation of enhanced sensor and display bridging, aggregation, and splitting functionality, a common requirement for industrial, automotive, computing, and consumer applications.
Developers want to enhance the user experience by adding multiple image sensors and/or displays to embedded vision systems, while also meeting system cost and power budgets. Lattice addresses this need with CrossLinkPlus FPGAs: small (3.5 x 3.5 mm), low power (< 300 µW) devices specifically optimized for embedded vision applications. The product utilizes an on-chip flash to support instant-on and flexible device reprogramming in the field.
- Key features of the CrossLinkPlus family of FPGAs include:
- On-device reprogrammable flash memory to enable instant-on (< 10 ms)
- Hardened, pre-verified MIPI D-PHY interface supporting speeds up to 6 Gbps per port
- Broad support for high-speed I/O interfaces such as LVDS, SLVS and subLVDS
- Comprehensive IP library, including MIPI CSI-2, MIPI DSI, OpenLDI transmitters and receivers. These IPs are compatible with other Lattice FPGAs for easy design portability.
- Compatible with the Lattice Diamond design software tool flow, from synthesis and design capture through implementation, verification, and programming
- Power consumption as low as 300 µW (standby) or 5 mW (operating)
Originally scheduled to begin sampling in Q4 2019, Lattice has already provided samples of its CrossLinkPlus FPGAs to customers for use in industrial and automotive applications.
More information: https://www.latticesemi.com/en/Products/FPGAandCPLD/CrossLinkPlus.