The single-chip devices in the S6J32xEK series include the graphics engine and provide scalability with Cypress’ low-pin-count HyperBus memory interface.
The Traveo S6J32xEK series integrates up to 4 MB of high-density embedded flash, 512 kB RAM and 2 MB of Video RAM, an Arm Cortex-R5 core at 240-MHz performance, LVDS video output, LVTTL video output and a 6x stepper motor control. This combination enables the devices to serve as single-chip solutions to drive two displays. The devices have up to two 12-pin HyperBus memory interfaces that improve read and write performance of graphical data and other data or code. A single HyperBus interface can be used to connect to two memories for Firmware Over-The-Air (FOTA) updates, which enable end-users to get software fixes and new features and applications for their vehicles on-the-go. The devices support all in-vehicle networking standards required for instrument clusters, including Controller Area Network-Flexible Data (CAN-FD) and Ethernet AVB. Additionally, the series provides robust security with integrated enhanced secure hardware extension (eSHE) support.
The Traveo S6J32xEK series include 50 channels of 12-bit ADC, 12 channels of multi-function serial interfaces and I 2S interfaces with an audio DAC to output the complex, high-quality sounds required in today’s instrument clusters. The devices’ support for Ethernet AVB delivers increased bandwidth in multimedia applications and reduced programming time. The S6J32xEK series offers functional safety features to support Automotive Safety Integrity Level (ASIL) B, and have ambient temperature range of -40°C to +105°C. The Traveo family is backed by a comprehensive tools and software ecosystem that simplifies system integration, including AUTOSAR MCAL 4.0.3 support.
The Traveo S6J32xEK series is sampling now and will be in production in the first quarter of 2018. The MCUs are available in a 208-pin and 216-pin thermally enhanced quad flat package (TEQFP).