The missing link for powering ECUs

August 24, 2021 // By Nick Flaherty
The missing link for powering ECUs
NXP’s Bylink concept helps ensure the synchronization between all devices to avoid any external additional components as well as meeting the safety requirements for automotive power.

NXP has developed a concept called Bylink for power management for automotive electronic control units (ECUs)

Specifying a power management approach for a given microcontroller and peripherals on an ECU used to be relatively easy. However, with the exponential growth in automotive system complexity, designers face numerous challenges. They now need devices that are intuitive, interchangeable and able to facilitate platform development for power management and safety.

Automotive system complexity continues to rise with the use of high-computing-performance MCUs and system-on-chips (SoCs) to deliver innovative applications and features, such as electrification, ADAS and zonal domain controllers, says Jean-Philippe Meunier, ADAS Segment Manager Advanced Power System NXP Semiconductor.

However powering all the different processors and system peripherals or high computing SoCs, safely and efficiently while simultaneously enabling complex power-up and power-down sequences, simplifying board design, incorporating scalability and reducing the risk of reliability failures caused by power hotspots is a significant challenge.

Designs are replicated across an entire family of vehicles with slight variations where the processors are selected first, and then the power management aspect. A discrete approach offers power scalability and flexibility in the placement and board layout, but as the solution becomes more complex, other components such as a sequencer, voltage monitoring and the need of diagnostics are required, says Meunier.

A small safety MCU with its software to manage the watchdog and system safety reaction could also be required. A power management IC (PMIC) or a system basis chip (SBC) based solution would support this complete set of features in one device without compromise on scalability and are easy to design.

A system basis chip (SBC) IC or a PMIC is used to address the increased complexity in automotive systems. With the different systems, there is the need to transfer power from the battery to multiple low-voltage domains. Switching to a distributed power architecture solves many of the design limitations of the 12 V/24 V main battery supply and standard 5 V automotive supply rail.

In a distributed power architecture, high-voltage SBC/PMICs (12/24 V) and multiple low-voltage PMICs (5 V) can be combined and configured to deliver a range of supply rails for a host of power needs. Additional rails can be created simply by expanding the number of low-voltage PMICs still powered by our high-voltage SBC/PMICs.

The NXP BYLink consists of different pin- and-software compatible ICs to enable customer platform approach and to satisfy different safety requirements such as QM / ASIL B, and ASIL D.

With a multi-PMIC system solution and the BYLink approach, the safety integration removes the barriers that such complex safety systems can bring. While individual low-voltage PMICs can be QM or ASIL B rated, the whole power domain ECU can gain ASIL D level through the primary high-voltage PMIC since it is responsible to monitor the critical voltages and the safety MCU, plus transition the system into safe state in case of system failure.

Another challenge of system complexity is the synchronization of the power-up and power-down sequence needed to initialize different controllers and peripherals. A programmable power up/down sequencer embedded in each device which can be configured to fine-tune the sequence time is an ideal option for flexibility and minimizing as well system BOM.

The BYLink concept helps ensure the synchronization between all devices to avoid any external additional components and allows individual devices to be physically separated, reducing major heat spots as the thermal management is at ECU level.

This enables  scalable power rails in a common IC footprint, which also share a familiar configuration interface for software portability between devices. These power management building blocks provide design flexibility and scalability with cascaded system PMICs essentially behaving as a single power supply solution.

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